1 module capstone.mips; 2 3 extern (C): 4 5 /* Capstone Disassembly Engine */ 6 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */ 7 8 // GCC MIPS toolchain has a default macro called "mips" which breaks 9 // compilation 10 11 /// Operand type for instruction's operands 12 enum mips_op_type 13 { 14 MIPS_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). 15 MIPS_OP_REG = 1, ///< = CS_OP_REG (Register operand). 16 MIPS_OP_IMM = 2, ///< = CS_OP_IMM (Immediate operand). 17 MIPS_OP_MEM = 3 ///< = CS_OP_MEM (Memory operand). 18 } 19 20 /// MIPS registers 21 enum mips_reg 22 { 23 MIPS_REG_INVALID = 0, 24 // General purpose registers 25 MIPS_REG_PC = 1, 26 27 MIPS_REG_0 = 2, 28 MIPS_REG_1 = 3, 29 MIPS_REG_2 = 4, 30 MIPS_REG_3 = 5, 31 MIPS_REG_4 = 6, 32 MIPS_REG_5 = 7, 33 MIPS_REG_6 = 8, 34 MIPS_REG_7 = 9, 35 MIPS_REG_8 = 10, 36 MIPS_REG_9 = 11, 37 MIPS_REG_10 = 12, 38 MIPS_REG_11 = 13, 39 MIPS_REG_12 = 14, 40 MIPS_REG_13 = 15, 41 MIPS_REG_14 = 16, 42 MIPS_REG_15 = 17, 43 MIPS_REG_16 = 18, 44 MIPS_REG_17 = 19, 45 MIPS_REG_18 = 20, 46 MIPS_REG_19 = 21, 47 MIPS_REG_20 = 22, 48 MIPS_REG_21 = 23, 49 MIPS_REG_22 = 24, 50 MIPS_REG_23 = 25, 51 MIPS_REG_24 = 26, 52 MIPS_REG_25 = 27, 53 MIPS_REG_26 = 28, 54 MIPS_REG_27 = 29, 55 MIPS_REG_28 = 30, 56 MIPS_REG_29 = 31, 57 MIPS_REG_30 = 32, 58 MIPS_REG_31 = 33, 59 60 // DSP registers 61 MIPS_REG_DSPCCOND = 34, 62 MIPS_REG_DSPCARRY = 35, 63 MIPS_REG_DSPEFI = 36, 64 MIPS_REG_DSPOUTFLAG = 37, 65 MIPS_REG_DSPOUTFLAG16_19 = 38, 66 MIPS_REG_DSPOUTFLAG20 = 39, 67 MIPS_REG_DSPOUTFLAG21 = 40, 68 MIPS_REG_DSPOUTFLAG22 = 41, 69 MIPS_REG_DSPOUTFLAG23 = 42, 70 MIPS_REG_DSPPOS = 43, 71 MIPS_REG_DSPSCOUNT = 44, 72 73 // ACC registers 74 MIPS_REG_AC0 = 45, 75 MIPS_REG_AC1 = 46, 76 MIPS_REG_AC2 = 47, 77 MIPS_REG_AC3 = 48, 78 79 // COP registers 80 MIPS_REG_CC0 = 49, 81 MIPS_REG_CC1 = 50, 82 MIPS_REG_CC2 = 51, 83 MIPS_REG_CC3 = 52, 84 MIPS_REG_CC4 = 53, 85 MIPS_REG_CC5 = 54, 86 MIPS_REG_CC6 = 55, 87 MIPS_REG_CC7 = 56, 88 89 // FPU registers 90 MIPS_REG_F0 = 57, 91 MIPS_REG_F1 = 58, 92 MIPS_REG_F2 = 59, 93 MIPS_REG_F3 = 60, 94 MIPS_REG_F4 = 61, 95 MIPS_REG_F5 = 62, 96 MIPS_REG_F6 = 63, 97 MIPS_REG_F7 = 64, 98 MIPS_REG_F8 = 65, 99 MIPS_REG_F9 = 66, 100 MIPS_REG_F10 = 67, 101 MIPS_REG_F11 = 68, 102 MIPS_REG_F12 = 69, 103 MIPS_REG_F13 = 70, 104 MIPS_REG_F14 = 71, 105 MIPS_REG_F15 = 72, 106 MIPS_REG_F16 = 73, 107 MIPS_REG_F17 = 74, 108 MIPS_REG_F18 = 75, 109 MIPS_REG_F19 = 76, 110 MIPS_REG_F20 = 77, 111 MIPS_REG_F21 = 78, 112 MIPS_REG_F22 = 79, 113 MIPS_REG_F23 = 80, 114 MIPS_REG_F24 = 81, 115 MIPS_REG_F25 = 82, 116 MIPS_REG_F26 = 83, 117 MIPS_REG_F27 = 84, 118 MIPS_REG_F28 = 85, 119 MIPS_REG_F29 = 86, 120 MIPS_REG_F30 = 87, 121 MIPS_REG_F31 = 88, 122 123 MIPS_REG_FCC0 = 89, 124 MIPS_REG_FCC1 = 90, 125 MIPS_REG_FCC2 = 91, 126 MIPS_REG_FCC3 = 92, 127 MIPS_REG_FCC4 = 93, 128 MIPS_REG_FCC5 = 94, 129 MIPS_REG_FCC6 = 95, 130 MIPS_REG_FCC7 = 96, 131 132 // AFPR128 133 MIPS_REG_W0 = 97, 134 MIPS_REG_W1 = 98, 135 MIPS_REG_W2 = 99, 136 MIPS_REG_W3 = 100, 137 MIPS_REG_W4 = 101, 138 MIPS_REG_W5 = 102, 139 MIPS_REG_W6 = 103, 140 MIPS_REG_W7 = 104, 141 MIPS_REG_W8 = 105, 142 MIPS_REG_W9 = 106, 143 MIPS_REG_W10 = 107, 144 MIPS_REG_W11 = 108, 145 MIPS_REG_W12 = 109, 146 MIPS_REG_W13 = 110, 147 MIPS_REG_W14 = 111, 148 MIPS_REG_W15 = 112, 149 MIPS_REG_W16 = 113, 150 MIPS_REG_W17 = 114, 151 MIPS_REG_W18 = 115, 152 MIPS_REG_W19 = 116, 153 MIPS_REG_W20 = 117, 154 MIPS_REG_W21 = 118, 155 MIPS_REG_W22 = 119, 156 MIPS_REG_W23 = 120, 157 MIPS_REG_W24 = 121, 158 MIPS_REG_W25 = 122, 159 MIPS_REG_W26 = 123, 160 MIPS_REG_W27 = 124, 161 MIPS_REG_W28 = 125, 162 MIPS_REG_W29 = 126, 163 MIPS_REG_W30 = 127, 164 MIPS_REG_W31 = 128, 165 166 MIPS_REG_HI = 129, 167 MIPS_REG_LO = 130, 168 169 MIPS_REG_P0 = 131, 170 MIPS_REG_P1 = 132, 171 MIPS_REG_P2 = 133, 172 173 MIPS_REG_MPL0 = 134, 174 MIPS_REG_MPL1 = 135, 175 MIPS_REG_MPL2 = 136, 176 177 MIPS_REG_ENDING = 137, // <-- mark the end of the list or registers 178 179 // alias registers 180 MIPS_REG_ZERO = MIPS_REG_0, 181 MIPS_REG_AT = MIPS_REG_1, 182 MIPS_REG_V0 = MIPS_REG_2, 183 MIPS_REG_V1 = MIPS_REG_3, 184 MIPS_REG_A0 = MIPS_REG_4, 185 MIPS_REG_A1 = MIPS_REG_5, 186 MIPS_REG_A2 = MIPS_REG_6, 187 MIPS_REG_A3 = MIPS_REG_7, 188 MIPS_REG_T0 = MIPS_REG_8, 189 MIPS_REG_T1 = MIPS_REG_9, 190 MIPS_REG_T2 = MIPS_REG_10, 191 MIPS_REG_T3 = MIPS_REG_11, 192 MIPS_REG_T4 = MIPS_REG_12, 193 MIPS_REG_T5 = MIPS_REG_13, 194 MIPS_REG_T6 = MIPS_REG_14, 195 MIPS_REG_T7 = MIPS_REG_15, 196 MIPS_REG_S0 = MIPS_REG_16, 197 MIPS_REG_S1 = MIPS_REG_17, 198 MIPS_REG_S2 = MIPS_REG_18, 199 MIPS_REG_S3 = MIPS_REG_19, 200 MIPS_REG_S4 = MIPS_REG_20, 201 MIPS_REG_S5 = MIPS_REG_21, 202 MIPS_REG_S6 = MIPS_REG_22, 203 MIPS_REG_S7 = MIPS_REG_23, 204 MIPS_REG_T8 = MIPS_REG_24, 205 MIPS_REG_T9 = MIPS_REG_25, 206 MIPS_REG_K0 = MIPS_REG_26, 207 MIPS_REG_K1 = MIPS_REG_27, 208 MIPS_REG_GP = MIPS_REG_28, 209 MIPS_REG_SP = MIPS_REG_29, 210 MIPS_REG_FP = MIPS_REG_30, 211 MIPS_REG_S8 = MIPS_REG_30, 212 MIPS_REG_RA = MIPS_REG_31, 213 214 MIPS_REG_HI0 = MIPS_REG_AC0, 215 MIPS_REG_HI1 = MIPS_REG_AC1, 216 MIPS_REG_HI2 = MIPS_REG_AC2, 217 MIPS_REG_HI3 = MIPS_REG_AC3, 218 219 MIPS_REG_LO0 = MIPS_REG_HI0, 220 MIPS_REG_LO1 = MIPS_REG_HI1, 221 MIPS_REG_LO2 = MIPS_REG_HI2, 222 MIPS_REG_LO3 = MIPS_REG_HI3 223 } 224 225 /// Instruction's operand referring to memory 226 /// This is associated with MIPS_OP_MEM operand type above 227 struct mips_op_mem 228 { 229 mips_reg base; ///< base register 230 long disp; ///< displacement/offset value 231 } 232 233 /// Instruction operand 234 struct cs_mips_op 235 { 236 mips_op_type type; ///< operand type 237 union 238 { 239 mips_reg reg; ///< register value for REG operand 240 long imm; ///< immediate value for IMM operand 241 mips_op_mem mem; ///< base/index/scale/disp value for MEM operand 242 } 243 } 244 245 /// Instruction structure 246 struct cs_mips 247 { 248 /// Number of operands of this instruction, 249 /// or 0 when instruction has no operand. 250 ubyte op_count; 251 cs_mips_op[10] operands; ///< operands for this instruction. 252 } 253 254 /// MIPS instruction 255 enum mips_insn 256 { 257 MIPS_INS_INVALID = 0, 258 259 MIPS_INS_ABSQ_S = 1, 260 MIPS_INS_ADD = 2, 261 MIPS_INS_ADDIUPC = 3, 262 MIPS_INS_ADDIUR1SP = 4, 263 MIPS_INS_ADDIUR2 = 5, 264 MIPS_INS_ADDIUS5 = 6, 265 MIPS_INS_ADDIUSP = 7, 266 MIPS_INS_ADDQH = 8, 267 MIPS_INS_ADDQH_R = 9, 268 MIPS_INS_ADDQ = 10, 269 MIPS_INS_ADDQ_S = 11, 270 MIPS_INS_ADDSC = 12, 271 MIPS_INS_ADDS_A = 13, 272 MIPS_INS_ADDS_S = 14, 273 MIPS_INS_ADDS_U = 15, 274 MIPS_INS_ADDU16 = 16, 275 MIPS_INS_ADDUH = 17, 276 MIPS_INS_ADDUH_R = 18, 277 MIPS_INS_ADDU = 19, 278 MIPS_INS_ADDU_S = 20, 279 MIPS_INS_ADDVI = 21, 280 MIPS_INS_ADDV = 22, 281 MIPS_INS_ADDWC = 23, 282 MIPS_INS_ADD_A = 24, 283 MIPS_INS_ADDI = 25, 284 MIPS_INS_ADDIU = 26, 285 MIPS_INS_ALIGN = 27, 286 MIPS_INS_ALUIPC = 28, 287 MIPS_INS_AND = 29, 288 MIPS_INS_AND16 = 30, 289 MIPS_INS_ANDI16 = 31, 290 MIPS_INS_ANDI = 32, 291 MIPS_INS_APPEND = 33, 292 MIPS_INS_ASUB_S = 34, 293 MIPS_INS_ASUB_U = 35, 294 MIPS_INS_AUI = 36, 295 MIPS_INS_AUIPC = 37, 296 MIPS_INS_AVER_S = 38, 297 MIPS_INS_AVER_U = 39, 298 MIPS_INS_AVE_S = 40, 299 MIPS_INS_AVE_U = 41, 300 MIPS_INS_B16 = 42, 301 MIPS_INS_BADDU = 43, 302 MIPS_INS_BAL = 44, 303 MIPS_INS_BALC = 45, 304 MIPS_INS_BALIGN = 46, 305 MIPS_INS_BBIT0 = 47, 306 MIPS_INS_BBIT032 = 48, 307 MIPS_INS_BBIT1 = 49, 308 MIPS_INS_BBIT132 = 50, 309 MIPS_INS_BC = 51, 310 MIPS_INS_BC0F = 52, 311 MIPS_INS_BC0FL = 53, 312 MIPS_INS_BC0T = 54, 313 MIPS_INS_BC0TL = 55, 314 MIPS_INS_BC1EQZ = 56, 315 MIPS_INS_BC1F = 57, 316 MIPS_INS_BC1FL = 58, 317 MIPS_INS_BC1NEZ = 59, 318 MIPS_INS_BC1T = 60, 319 MIPS_INS_BC1TL = 61, 320 MIPS_INS_BC2EQZ = 62, 321 MIPS_INS_BC2F = 63, 322 MIPS_INS_BC2FL = 64, 323 MIPS_INS_BC2NEZ = 65, 324 MIPS_INS_BC2T = 66, 325 MIPS_INS_BC2TL = 67, 326 MIPS_INS_BC3F = 68, 327 MIPS_INS_BC3FL = 69, 328 MIPS_INS_BC3T = 70, 329 MIPS_INS_BC3TL = 71, 330 MIPS_INS_BCLRI = 72, 331 MIPS_INS_BCLR = 73, 332 MIPS_INS_BEQ = 74, 333 MIPS_INS_BEQC = 75, 334 MIPS_INS_BEQL = 76, 335 MIPS_INS_BEQZ16 = 77, 336 MIPS_INS_BEQZALC = 78, 337 MIPS_INS_BEQZC = 79, 338 MIPS_INS_BGEC = 80, 339 MIPS_INS_BGEUC = 81, 340 MIPS_INS_BGEZ = 82, 341 MIPS_INS_BGEZAL = 83, 342 MIPS_INS_BGEZALC = 84, 343 MIPS_INS_BGEZALL = 85, 344 MIPS_INS_BGEZALS = 86, 345 MIPS_INS_BGEZC = 87, 346 MIPS_INS_BGEZL = 88, 347 MIPS_INS_BGTZ = 89, 348 MIPS_INS_BGTZALC = 90, 349 MIPS_INS_BGTZC = 91, 350 MIPS_INS_BGTZL = 92, 351 MIPS_INS_BINSLI = 93, 352 MIPS_INS_BINSL = 94, 353 MIPS_INS_BINSRI = 95, 354 MIPS_INS_BINSR = 96, 355 MIPS_INS_BITREV = 97, 356 MIPS_INS_BITSWAP = 98, 357 MIPS_INS_BLEZ = 99, 358 MIPS_INS_BLEZALC = 100, 359 MIPS_INS_BLEZC = 101, 360 MIPS_INS_BLEZL = 102, 361 MIPS_INS_BLTC = 103, 362 MIPS_INS_BLTUC = 104, 363 MIPS_INS_BLTZ = 105, 364 MIPS_INS_BLTZAL = 106, 365 MIPS_INS_BLTZALC = 107, 366 MIPS_INS_BLTZALL = 108, 367 MIPS_INS_BLTZALS = 109, 368 MIPS_INS_BLTZC = 110, 369 MIPS_INS_BLTZL = 111, 370 MIPS_INS_BMNZI = 112, 371 MIPS_INS_BMNZ = 113, 372 MIPS_INS_BMZI = 114, 373 MIPS_INS_BMZ = 115, 374 MIPS_INS_BNE = 116, 375 MIPS_INS_BNEC = 117, 376 MIPS_INS_BNEGI = 118, 377 MIPS_INS_BNEG = 119, 378 MIPS_INS_BNEL = 120, 379 MIPS_INS_BNEZ16 = 121, 380 MIPS_INS_BNEZALC = 122, 381 MIPS_INS_BNEZC = 123, 382 MIPS_INS_BNVC = 124, 383 MIPS_INS_BNZ = 125, 384 MIPS_INS_BOVC = 126, 385 MIPS_INS_BPOSGE32 = 127, 386 MIPS_INS_BREAK = 128, 387 MIPS_INS_BREAK16 = 129, 388 MIPS_INS_BSELI = 130, 389 MIPS_INS_BSEL = 131, 390 MIPS_INS_BSETI = 132, 391 MIPS_INS_BSET = 133, 392 MIPS_INS_BZ = 134, 393 MIPS_INS_BEQZ = 135, 394 MIPS_INS_B = 136, 395 MIPS_INS_BNEZ = 137, 396 MIPS_INS_BTEQZ = 138, 397 MIPS_INS_BTNEZ = 139, 398 MIPS_INS_CACHE = 140, 399 MIPS_INS_CEIL = 141, 400 MIPS_INS_CEQI = 142, 401 MIPS_INS_CEQ = 143, 402 MIPS_INS_CFC1 = 144, 403 MIPS_INS_CFCMSA = 145, 404 MIPS_INS_CINS = 146, 405 MIPS_INS_CINS32 = 147, 406 MIPS_INS_CLASS = 148, 407 MIPS_INS_CLEI_S = 149, 408 MIPS_INS_CLEI_U = 150, 409 MIPS_INS_CLE_S = 151, 410 MIPS_INS_CLE_U = 152, 411 MIPS_INS_CLO = 153, 412 MIPS_INS_CLTI_S = 154, 413 MIPS_INS_CLTI_U = 155, 414 MIPS_INS_CLT_S = 156, 415 MIPS_INS_CLT_U = 157, 416 MIPS_INS_CLZ = 158, 417 MIPS_INS_CMPGDU = 159, 418 MIPS_INS_CMPGU = 160, 419 MIPS_INS_CMPU = 161, 420 MIPS_INS_CMP = 162, 421 MIPS_INS_COPY_S = 163, 422 MIPS_INS_COPY_U = 164, 423 MIPS_INS_CTC1 = 165, 424 MIPS_INS_CTCMSA = 166, 425 MIPS_INS_CVT = 167, 426 MIPS_INS_C = 168, 427 MIPS_INS_CMPI = 169, 428 MIPS_INS_DADD = 170, 429 MIPS_INS_DADDI = 171, 430 MIPS_INS_DADDIU = 172, 431 MIPS_INS_DADDU = 173, 432 MIPS_INS_DAHI = 174, 433 MIPS_INS_DALIGN = 175, 434 MIPS_INS_DATI = 176, 435 MIPS_INS_DAUI = 177, 436 MIPS_INS_DBITSWAP = 178, 437 MIPS_INS_DCLO = 179, 438 MIPS_INS_DCLZ = 180, 439 MIPS_INS_DDIV = 181, 440 MIPS_INS_DDIVU = 182, 441 MIPS_INS_DERET = 183, 442 MIPS_INS_DEXT = 184, 443 MIPS_INS_DEXTM = 185, 444 MIPS_INS_DEXTU = 186, 445 MIPS_INS_DI = 187, 446 MIPS_INS_DINS = 188, 447 MIPS_INS_DINSM = 189, 448 MIPS_INS_DINSU = 190, 449 MIPS_INS_DIV = 191, 450 MIPS_INS_DIVU = 192, 451 MIPS_INS_DIV_S = 193, 452 MIPS_INS_DIV_U = 194, 453 MIPS_INS_DLSA = 195, 454 MIPS_INS_DMFC0 = 196, 455 MIPS_INS_DMFC1 = 197, 456 MIPS_INS_DMFC2 = 198, 457 MIPS_INS_DMOD = 199, 458 MIPS_INS_DMODU = 200, 459 MIPS_INS_DMTC0 = 201, 460 MIPS_INS_DMTC1 = 202, 461 MIPS_INS_DMTC2 = 203, 462 MIPS_INS_DMUH = 204, 463 MIPS_INS_DMUHU = 205, 464 MIPS_INS_DMUL = 206, 465 MIPS_INS_DMULT = 207, 466 MIPS_INS_DMULTU = 208, 467 MIPS_INS_DMULU = 209, 468 MIPS_INS_DOTP_S = 210, 469 MIPS_INS_DOTP_U = 211, 470 MIPS_INS_DPADD_S = 212, 471 MIPS_INS_DPADD_U = 213, 472 MIPS_INS_DPAQX_SA = 214, 473 MIPS_INS_DPAQX_S = 215, 474 MIPS_INS_DPAQ_SA = 216, 475 MIPS_INS_DPAQ_S = 217, 476 MIPS_INS_DPAU = 218, 477 MIPS_INS_DPAX = 219, 478 MIPS_INS_DPA = 220, 479 MIPS_INS_DPOP = 221, 480 MIPS_INS_DPSQX_SA = 222, 481 MIPS_INS_DPSQX_S = 223, 482 MIPS_INS_DPSQ_SA = 224, 483 MIPS_INS_DPSQ_S = 225, 484 MIPS_INS_DPSUB_S = 226, 485 MIPS_INS_DPSUB_U = 227, 486 MIPS_INS_DPSU = 228, 487 MIPS_INS_DPSX = 229, 488 MIPS_INS_DPS = 230, 489 MIPS_INS_DROTR = 231, 490 MIPS_INS_DROTR32 = 232, 491 MIPS_INS_DROTRV = 233, 492 MIPS_INS_DSBH = 234, 493 MIPS_INS_DSHD = 235, 494 MIPS_INS_DSLL = 236, 495 MIPS_INS_DSLL32 = 237, 496 MIPS_INS_DSLLV = 238, 497 MIPS_INS_DSRA = 239, 498 MIPS_INS_DSRA32 = 240, 499 MIPS_INS_DSRAV = 241, 500 MIPS_INS_DSRL = 242, 501 MIPS_INS_DSRL32 = 243, 502 MIPS_INS_DSRLV = 244, 503 MIPS_INS_DSUB = 245, 504 MIPS_INS_DSUBU = 246, 505 MIPS_INS_EHB = 247, 506 MIPS_INS_EI = 248, 507 MIPS_INS_ERET = 249, 508 MIPS_INS_EXT = 250, 509 MIPS_INS_EXTP = 251, 510 MIPS_INS_EXTPDP = 252, 511 MIPS_INS_EXTPDPV = 253, 512 MIPS_INS_EXTPV = 254, 513 MIPS_INS_EXTRV_RS = 255, 514 MIPS_INS_EXTRV_R = 256, 515 MIPS_INS_EXTRV_S = 257, 516 MIPS_INS_EXTRV = 258, 517 MIPS_INS_EXTR_RS = 259, 518 MIPS_INS_EXTR_R = 260, 519 MIPS_INS_EXTR_S = 261, 520 MIPS_INS_EXTR = 262, 521 MIPS_INS_EXTS = 263, 522 MIPS_INS_EXTS32 = 264, 523 MIPS_INS_ABS = 265, 524 MIPS_INS_FADD = 266, 525 MIPS_INS_FCAF = 267, 526 MIPS_INS_FCEQ = 268, 527 MIPS_INS_FCLASS = 269, 528 MIPS_INS_FCLE = 270, 529 MIPS_INS_FCLT = 271, 530 MIPS_INS_FCNE = 272, 531 MIPS_INS_FCOR = 273, 532 MIPS_INS_FCUEQ = 274, 533 MIPS_INS_FCULE = 275, 534 MIPS_INS_FCULT = 276, 535 MIPS_INS_FCUNE = 277, 536 MIPS_INS_FCUN = 278, 537 MIPS_INS_FDIV = 279, 538 MIPS_INS_FEXDO = 280, 539 MIPS_INS_FEXP2 = 281, 540 MIPS_INS_FEXUPL = 282, 541 MIPS_INS_FEXUPR = 283, 542 MIPS_INS_FFINT_S = 284, 543 MIPS_INS_FFINT_U = 285, 544 MIPS_INS_FFQL = 286, 545 MIPS_INS_FFQR = 287, 546 MIPS_INS_FILL = 288, 547 MIPS_INS_FLOG2 = 289, 548 MIPS_INS_FLOOR = 290, 549 MIPS_INS_FMADD = 291, 550 MIPS_INS_FMAX_A = 292, 551 MIPS_INS_FMAX = 293, 552 MIPS_INS_FMIN_A = 294, 553 MIPS_INS_FMIN = 295, 554 MIPS_INS_MOV = 296, 555 MIPS_INS_FMSUB = 297, 556 MIPS_INS_FMUL = 298, 557 MIPS_INS_MUL = 299, 558 MIPS_INS_NEG = 300, 559 MIPS_INS_FRCP = 301, 560 MIPS_INS_FRINT = 302, 561 MIPS_INS_FRSQRT = 303, 562 MIPS_INS_FSAF = 304, 563 MIPS_INS_FSEQ = 305, 564 MIPS_INS_FSLE = 306, 565 MIPS_INS_FSLT = 307, 566 MIPS_INS_FSNE = 308, 567 MIPS_INS_FSOR = 309, 568 MIPS_INS_FSQRT = 310, 569 MIPS_INS_SQRT = 311, 570 MIPS_INS_FSUB = 312, 571 MIPS_INS_SUB = 313, 572 MIPS_INS_FSUEQ = 314, 573 MIPS_INS_FSULE = 315, 574 MIPS_INS_FSULT = 316, 575 MIPS_INS_FSUNE = 317, 576 MIPS_INS_FSUN = 318, 577 MIPS_INS_FTINT_S = 319, 578 MIPS_INS_FTINT_U = 320, 579 MIPS_INS_FTQ = 321, 580 MIPS_INS_FTRUNC_S = 322, 581 MIPS_INS_FTRUNC_U = 323, 582 MIPS_INS_HADD_S = 324, 583 MIPS_INS_HADD_U = 325, 584 MIPS_INS_HSUB_S = 326, 585 MIPS_INS_HSUB_U = 327, 586 MIPS_INS_ILVEV = 328, 587 MIPS_INS_ILVL = 329, 588 MIPS_INS_ILVOD = 330, 589 MIPS_INS_ILVR = 331, 590 MIPS_INS_INS = 332, 591 MIPS_INS_INSERT = 333, 592 MIPS_INS_INSV = 334, 593 MIPS_INS_INSVE = 335, 594 MIPS_INS_J = 336, 595 MIPS_INS_JAL = 337, 596 MIPS_INS_JALR = 338, 597 MIPS_INS_JALRS16 = 339, 598 MIPS_INS_JALRS = 340, 599 MIPS_INS_JALS = 341, 600 MIPS_INS_JALX = 342, 601 MIPS_INS_JIALC = 343, 602 MIPS_INS_JIC = 344, 603 MIPS_INS_JR = 345, 604 MIPS_INS_JR16 = 346, 605 MIPS_INS_JRADDIUSP = 347, 606 MIPS_INS_JRC = 348, 607 MIPS_INS_JALRC = 349, 608 MIPS_INS_LB = 350, 609 MIPS_INS_LBU16 = 351, 610 MIPS_INS_LBUX = 352, 611 MIPS_INS_LBU = 353, 612 MIPS_INS_LD = 354, 613 MIPS_INS_LDC1 = 355, 614 MIPS_INS_LDC2 = 356, 615 MIPS_INS_LDC3 = 357, 616 MIPS_INS_LDI = 358, 617 MIPS_INS_LDL = 359, 618 MIPS_INS_LDPC = 360, 619 MIPS_INS_LDR = 361, 620 MIPS_INS_LDXC1 = 362, 621 MIPS_INS_LH = 363, 622 MIPS_INS_LHU16 = 364, 623 MIPS_INS_LHX = 365, 624 MIPS_INS_LHU = 366, 625 MIPS_INS_LI16 = 367, 626 MIPS_INS_LL = 368, 627 MIPS_INS_LLD = 369, 628 MIPS_INS_LSA = 370, 629 MIPS_INS_LUXC1 = 371, 630 MIPS_INS_LUI = 372, 631 MIPS_INS_LW = 373, 632 MIPS_INS_LW16 = 374, 633 MIPS_INS_LWC1 = 375, 634 MIPS_INS_LWC2 = 376, 635 MIPS_INS_LWC3 = 377, 636 MIPS_INS_LWL = 378, 637 MIPS_INS_LWM16 = 379, 638 MIPS_INS_LWM32 = 380, 639 MIPS_INS_LWPC = 381, 640 MIPS_INS_LWP = 382, 641 MIPS_INS_LWR = 383, 642 MIPS_INS_LWUPC = 384, 643 MIPS_INS_LWU = 385, 644 MIPS_INS_LWX = 386, 645 MIPS_INS_LWXC1 = 387, 646 MIPS_INS_LWXS = 388, 647 MIPS_INS_LI = 389, 648 MIPS_INS_MADD = 390, 649 MIPS_INS_MADDF = 391, 650 MIPS_INS_MADDR_Q = 392, 651 MIPS_INS_MADDU = 393, 652 MIPS_INS_MADDV = 394, 653 MIPS_INS_MADD_Q = 395, 654 MIPS_INS_MAQ_SA = 396, 655 MIPS_INS_MAQ_S = 397, 656 MIPS_INS_MAXA = 398, 657 MIPS_INS_MAXI_S = 399, 658 MIPS_INS_MAXI_U = 400, 659 MIPS_INS_MAX_A = 401, 660 MIPS_INS_MAX = 402, 661 MIPS_INS_MAX_S = 403, 662 MIPS_INS_MAX_U = 404, 663 MIPS_INS_MFC0 = 405, 664 MIPS_INS_MFC1 = 406, 665 MIPS_INS_MFC2 = 407, 666 MIPS_INS_MFHC1 = 408, 667 MIPS_INS_MFHI = 409, 668 MIPS_INS_MFLO = 410, 669 MIPS_INS_MINA = 411, 670 MIPS_INS_MINI_S = 412, 671 MIPS_INS_MINI_U = 413, 672 MIPS_INS_MIN_A = 414, 673 MIPS_INS_MIN = 415, 674 MIPS_INS_MIN_S = 416, 675 MIPS_INS_MIN_U = 417, 676 MIPS_INS_MOD = 418, 677 MIPS_INS_MODSUB = 419, 678 MIPS_INS_MODU = 420, 679 MIPS_INS_MOD_S = 421, 680 MIPS_INS_MOD_U = 422, 681 MIPS_INS_MOVE = 423, 682 MIPS_INS_MOVEP = 424, 683 MIPS_INS_MOVF = 425, 684 MIPS_INS_MOVN = 426, 685 MIPS_INS_MOVT = 427, 686 MIPS_INS_MOVZ = 428, 687 MIPS_INS_MSUB = 429, 688 MIPS_INS_MSUBF = 430, 689 MIPS_INS_MSUBR_Q = 431, 690 MIPS_INS_MSUBU = 432, 691 MIPS_INS_MSUBV = 433, 692 MIPS_INS_MSUB_Q = 434, 693 MIPS_INS_MTC0 = 435, 694 MIPS_INS_MTC1 = 436, 695 MIPS_INS_MTC2 = 437, 696 MIPS_INS_MTHC1 = 438, 697 MIPS_INS_MTHI = 439, 698 MIPS_INS_MTHLIP = 440, 699 MIPS_INS_MTLO = 441, 700 MIPS_INS_MTM0 = 442, 701 MIPS_INS_MTM1 = 443, 702 MIPS_INS_MTM2 = 444, 703 MIPS_INS_MTP0 = 445, 704 MIPS_INS_MTP1 = 446, 705 MIPS_INS_MTP2 = 447, 706 MIPS_INS_MUH = 448, 707 MIPS_INS_MUHU = 449, 708 MIPS_INS_MULEQ_S = 450, 709 MIPS_INS_MULEU_S = 451, 710 MIPS_INS_MULQ_RS = 452, 711 MIPS_INS_MULQ_S = 453, 712 MIPS_INS_MULR_Q = 454, 713 MIPS_INS_MULSAQ_S = 455, 714 MIPS_INS_MULSA = 456, 715 MIPS_INS_MULT = 457, 716 MIPS_INS_MULTU = 458, 717 MIPS_INS_MULU = 459, 718 MIPS_INS_MULV = 460, 719 MIPS_INS_MUL_Q = 461, 720 MIPS_INS_MUL_S = 462, 721 MIPS_INS_NLOC = 463, 722 MIPS_INS_NLZC = 464, 723 MIPS_INS_NMADD = 465, 724 MIPS_INS_NMSUB = 466, 725 MIPS_INS_NOR = 467, 726 MIPS_INS_NORI = 468, 727 MIPS_INS_NOT16 = 469, 728 MIPS_INS_NOT = 470, 729 MIPS_INS_OR = 471, 730 MIPS_INS_OR16 = 472, 731 MIPS_INS_ORI = 473, 732 MIPS_INS_PACKRL = 474, 733 MIPS_INS_PAUSE = 475, 734 MIPS_INS_PCKEV = 476, 735 MIPS_INS_PCKOD = 477, 736 MIPS_INS_PCNT = 478, 737 MIPS_INS_PICK = 479, 738 MIPS_INS_POP = 480, 739 MIPS_INS_PRECEQU = 481, 740 MIPS_INS_PRECEQ = 482, 741 MIPS_INS_PRECEU = 483, 742 MIPS_INS_PRECRQU_S = 484, 743 MIPS_INS_PRECRQ = 485, 744 MIPS_INS_PRECRQ_RS = 486, 745 MIPS_INS_PRECR = 487, 746 MIPS_INS_PRECR_SRA = 488, 747 MIPS_INS_PRECR_SRA_R = 489, 748 MIPS_INS_PREF = 490, 749 MIPS_INS_PREPEND = 491, 750 MIPS_INS_RADDU = 492, 751 MIPS_INS_RDDSP = 493, 752 MIPS_INS_RDHWR = 494, 753 MIPS_INS_REPLV = 495, 754 MIPS_INS_REPL = 496, 755 MIPS_INS_RINT = 497, 756 MIPS_INS_ROTR = 498, 757 MIPS_INS_ROTRV = 499, 758 MIPS_INS_ROUND = 500, 759 MIPS_INS_SAT_S = 501, 760 MIPS_INS_SAT_U = 502, 761 MIPS_INS_SB = 503, 762 MIPS_INS_SB16 = 504, 763 MIPS_INS_SC = 505, 764 MIPS_INS_SCD = 506, 765 MIPS_INS_SD = 507, 766 MIPS_INS_SDBBP = 508, 767 MIPS_INS_SDBBP16 = 509, 768 MIPS_INS_SDC1 = 510, 769 MIPS_INS_SDC2 = 511, 770 MIPS_INS_SDC3 = 512, 771 MIPS_INS_SDL = 513, 772 MIPS_INS_SDR = 514, 773 MIPS_INS_SDXC1 = 515, 774 MIPS_INS_SEB = 516, 775 MIPS_INS_SEH = 517, 776 MIPS_INS_SELEQZ = 518, 777 MIPS_INS_SELNEZ = 519, 778 MIPS_INS_SEL = 520, 779 MIPS_INS_SEQ = 521, 780 MIPS_INS_SEQI = 522, 781 MIPS_INS_SH = 523, 782 MIPS_INS_SH16 = 524, 783 MIPS_INS_SHF = 525, 784 MIPS_INS_SHILO = 526, 785 MIPS_INS_SHILOV = 527, 786 MIPS_INS_SHLLV = 528, 787 MIPS_INS_SHLLV_S = 529, 788 MIPS_INS_SHLL = 530, 789 MIPS_INS_SHLL_S = 531, 790 MIPS_INS_SHRAV = 532, 791 MIPS_INS_SHRAV_R = 533, 792 MIPS_INS_SHRA = 534, 793 MIPS_INS_SHRA_R = 535, 794 MIPS_INS_SHRLV = 536, 795 MIPS_INS_SHRL = 537, 796 MIPS_INS_SLDI = 538, 797 MIPS_INS_SLD = 539, 798 MIPS_INS_SLL = 540, 799 MIPS_INS_SLL16 = 541, 800 MIPS_INS_SLLI = 542, 801 MIPS_INS_SLLV = 543, 802 MIPS_INS_SLT = 544, 803 MIPS_INS_SLTI = 545, 804 MIPS_INS_SLTIU = 546, 805 MIPS_INS_SLTU = 547, 806 MIPS_INS_SNE = 548, 807 MIPS_INS_SNEI = 549, 808 MIPS_INS_SPLATI = 550, 809 MIPS_INS_SPLAT = 551, 810 MIPS_INS_SRA = 552, 811 MIPS_INS_SRAI = 553, 812 MIPS_INS_SRARI = 554, 813 MIPS_INS_SRAR = 555, 814 MIPS_INS_SRAV = 556, 815 MIPS_INS_SRL = 557, 816 MIPS_INS_SRL16 = 558, 817 MIPS_INS_SRLI = 559, 818 MIPS_INS_SRLRI = 560, 819 MIPS_INS_SRLR = 561, 820 MIPS_INS_SRLV = 562, 821 MIPS_INS_SSNOP = 563, 822 MIPS_INS_ST = 564, 823 MIPS_INS_SUBQH = 565, 824 MIPS_INS_SUBQH_R = 566, 825 MIPS_INS_SUBQ = 567, 826 MIPS_INS_SUBQ_S = 568, 827 MIPS_INS_SUBSUS_U = 569, 828 MIPS_INS_SUBSUU_S = 570, 829 MIPS_INS_SUBS_S = 571, 830 MIPS_INS_SUBS_U = 572, 831 MIPS_INS_SUBU16 = 573, 832 MIPS_INS_SUBUH = 574, 833 MIPS_INS_SUBUH_R = 575, 834 MIPS_INS_SUBU = 576, 835 MIPS_INS_SUBU_S = 577, 836 MIPS_INS_SUBVI = 578, 837 MIPS_INS_SUBV = 579, 838 MIPS_INS_SUXC1 = 580, 839 MIPS_INS_SW = 581, 840 MIPS_INS_SW16 = 582, 841 MIPS_INS_SWC1 = 583, 842 MIPS_INS_SWC2 = 584, 843 MIPS_INS_SWC3 = 585, 844 MIPS_INS_SWL = 586, 845 MIPS_INS_SWM16 = 587, 846 MIPS_INS_SWM32 = 588, 847 MIPS_INS_SWP = 589, 848 MIPS_INS_SWR = 590, 849 MIPS_INS_SWXC1 = 591, 850 MIPS_INS_SYNC = 592, 851 MIPS_INS_SYNCI = 593, 852 MIPS_INS_SYSCALL = 594, 853 MIPS_INS_TEQ = 595, 854 MIPS_INS_TEQI = 596, 855 MIPS_INS_TGE = 597, 856 MIPS_INS_TGEI = 598, 857 MIPS_INS_TGEIU = 599, 858 MIPS_INS_TGEU = 600, 859 MIPS_INS_TLBP = 601, 860 MIPS_INS_TLBR = 602, 861 MIPS_INS_TLBWI = 603, 862 MIPS_INS_TLBWR = 604, 863 MIPS_INS_TLT = 605, 864 MIPS_INS_TLTI = 606, 865 MIPS_INS_TLTIU = 607, 866 MIPS_INS_TLTU = 608, 867 MIPS_INS_TNE = 609, 868 MIPS_INS_TNEI = 610, 869 MIPS_INS_TRUNC = 611, 870 MIPS_INS_V3MULU = 612, 871 MIPS_INS_VMM0 = 613, 872 MIPS_INS_VMULU = 614, 873 MIPS_INS_VSHF = 615, 874 MIPS_INS_WAIT = 616, 875 MIPS_INS_WRDSP = 617, 876 MIPS_INS_WSBH = 618, 877 MIPS_INS_XOR = 619, 878 MIPS_INS_XOR16 = 620, 879 MIPS_INS_XORI = 621, 880 881 //> some alias instructions 882 MIPS_INS_NOP = 622, 883 MIPS_INS_NEGU = 623, 884 885 //> special instructions 886 MIPS_INS_JALR_HB = 624, // jump and link with Hazard Barrier 887 MIPS_INS_JR_HB = 625, // jump register with Hazard Barrier 888 889 MIPS_INS_ENDING = 626 890 } 891 892 /// Group of MIPS instructions 893 enum mips_insn_group 894 { 895 MIPS_GRP_INVALID = 0, ///< = CS_GRP_INVALID 896 897 // Generic groups 898 // all jump instructions (conditional+direct+indirect jumps) 899 MIPS_GRP_JUMP = 1, ///< = CS_GRP_JUMP 900 // all call instructions 901 MIPS_GRP_CALL = 2, ///< = CS_GRP_CALL 902 // all return instructions 903 MIPS_GRP_RET = 3, ///< = CS_GRP_RET 904 // all interrupt instructions (int+syscall) 905 MIPS_GRP_INT = 4, ///< = CS_GRP_INT 906 // all interrupt return instructions 907 MIPS_GRP_IRET = 5, ///< = CS_GRP_IRET 908 // all privileged instructions 909 MIPS_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE 910 // all relative branching instructions 911 MIPS_GRP_BRANCH_RELATIVE = 7, ///< = CS_GRP_BRANCH_RELATIVE 912 913 // Architecture-specific groups 914 MIPS_GRP_BITCOUNT = 128, 915 MIPS_GRP_DSP = 129, 916 MIPS_GRP_DSPR2 = 130, 917 MIPS_GRP_FPIDX = 131, 918 MIPS_GRP_MSA = 132, 919 MIPS_GRP_MIPS32R2 = 133, 920 MIPS_GRP_MIPS64 = 134, 921 MIPS_GRP_MIPS64R2 = 135, 922 MIPS_GRP_SEINREG = 136, 923 MIPS_GRP_STDENC = 137, 924 MIPS_GRP_SWAP = 138, 925 MIPS_GRP_MICROMIPS = 139, 926 MIPS_GRP_MIPS16MODE = 140, 927 MIPS_GRP_FP64BIT = 141, 928 MIPS_GRP_NONANSFPMATH = 142, 929 MIPS_GRP_NOTFP64BIT = 143, 930 MIPS_GRP_NOTINMICROMIPS = 144, 931 MIPS_GRP_NOTNACL = 145, 932 MIPS_GRP_NOTMIPS32R6 = 146, 933 MIPS_GRP_NOTMIPS64R6 = 147, 934 MIPS_GRP_CNMIPS = 148, 935 MIPS_GRP_MIPS32 = 149, 936 MIPS_GRP_MIPS32R6 = 150, 937 MIPS_GRP_MIPS64R6 = 151, 938 MIPS_GRP_MIPS2 = 152, 939 MIPS_GRP_MIPS3 = 153, 940 MIPS_GRP_MIPS3_32 = 154, 941 MIPS_GRP_MIPS3_32R2 = 155, 942 MIPS_GRP_MIPS4_32 = 156, 943 MIPS_GRP_MIPS4_32R2 = 157, 944 MIPS_GRP_MIPS5_32R2 = 158, 945 MIPS_GRP_GP32BIT = 159, 946 MIPS_GRP_GP64BIT = 160, 947 948 MIPS_GRP_ENDING = 161 949 }